Lattice Semiconductor CEO, Jim Anderson, presents at its announcement in Silicon Valley
Mark Vena, Moor Insights & Strategy
I’ve been spending a lot of time watching Lattice Semiconductor lately. While it is not a new company (founded in 1983), it is a company newly refocused on the creation of lower power FPGAs after the installation of industry veteran Jim Anderson as CEO in September 2018. There’s been immense change at Lattice in terms of management, culture, strategy, and financials (which I had the chance to learn about in depth at the company’s recent Financial Analyst Day). Today Lattice Semiconductor continued its renaissance with the launch of two new offerings—the Lattice Nexus FPGA development platform, and CrossLink-NX, the first family of FPGAs on the new Nexus platform. Let’s take a closer look at these latest moves by Lattice.
Though it was alluded to during the company’s recent Financial Analyst Day, today at a launch event Moor Insights & Strategy analyst Mark Vena attended, marks the official unveiling of Lattice Nexus, the company’s (and the entire industry’s for that matter) first 28nm FD-SOI-based (fully-depleted silicon-on-insulator) FPGA development platform. Leveraging Samsung Foundry’s 28FDS manufacturing process technology, Lattice says the platform’s FPGAs will consume as much as 75% less power than competing FPGAs of a similar class.. Lattice says that this utilization of a platform-based approach to product development will enable the company to launch products more frequently, maximize its design reuse, and reduce the overall cost of product development.
Another plus of Lattice Nexus is that it supports the smallest form factor devices—as much as ten times smaller than Lattice’s competitors’ FPGAs with similar density. This factor, along with the platform’s impressively low power consumption, are all key to its value prop. Edge computing is on the rise, a trend that will continue with the proliferation of connected devices and the widespread deployment of 5G networks. Edge computing requires increasingly small devices with minimal power consumption in order to maximize batter life—precisely what the Lattice Nexus platform seeks to deliver.
As for its performance capabilities, Lattice Nexus delivers ultra-fast, 3 ms I/O boot, 2.5 MBps MIPI D-PHY, and 0.5 Mbit RAM blocks for the purpose of processing acceleration in in embedded vision, Edge AI, and other inferencing applications. Additionally, according to Lattice, the insulated gate of the platform’s FD-SOI technology makes the platform highly reliable—it features a soft error rate, purportedly as much as 100 times lower than some competitors’ devices.
This brings us to CrossLink-NX, Lattice’s first product on the new Nexus platform. An extension of its CrossLink Plus offering launched in October (see my coverage here) CrossLink-NX claims to deliver all of the things the Lattice Nexus platform promised to enable. It claims up to a 75% reduction in power compared to its competition and is available in tiny form factors—from 36mm2 to 100mm2. It features two operating modes—high performance or low power—and according to Lattice, provides “excellent” control over current leakage. Thanks to Lattice Nexus, it features a soft error rate up to 100 times lower than similar competing FPGAs. This is crucial for mission-critical applications that can’t afford downtime and absolutely must be safe and reliable. Lattice also says CrossLink-NX supports the high temperature grades of industrial settings, with automotive grade purportedly coming soon.
CrossLink-NX features up to 40K logic cells, 5 Gbps PCIe and 1066 Mbps DDR3 memory. These high-speed I/Os will appeal to those developing smart vision applications, where speed and performance are crucial. Nexus purports to enable quick I/O configuration for CrossLink-NX (less than 3 ms), and, for that matter, total device configuration in less than 15 ms.
In the early development of CrossLink-NX, Lattice informed the product’s development by meeting with 65+ customers to hear firsthand about design challenges they face when building devices that support Edge computing. They told Lattice it’s all about low power, high performance and reliability. To illustrate, Lattice had two customers join them onstage, Axon and Waymo.
Axon develops camera systems for law enforcement and first responders, including body cameras. As you can imagine, someone wearing a body camera would want it to be as small and light weight as possible, but perform for extended periods of time without a battery charge. Using a low power FPGA like CrossLink-NX to handle video processing functions in the body camera helps keep it small and low power; Axon estimates they were able to cut the length and weight a body camera system by half using CrossLink-NX.
Waymo, an autonomous car technology developer (formerly Google’s self-driving car project), said while FPGAs are known for providing strong processing performance, most of their developers saw them as physically too large and too power hungry for the ADAS applications they’re developing. Not only were they were surprised to find CrossLink-NX to be smaller and to consume much less power than what they’d come to expect from FPGAs, they also found CrossLink-NX easy to work with, even if they hadn’t worked with FPGAs in previous designs. Waymo said that Lattice provided great support and the Lattice Diamond software design tool was powerful and easy to use. In particular, they cited the off-the-shelf IP that Lattice offers for it FPGAs really helped shrink design time so they could get applications developed fast.
Lattice uncharacteristically showed some hard-hitting demos to show off its technologies. We normally see these competitive demos from AMD and Intel, but not in FPGAs, and I appreciated them a lot.
Demo #1 – Human presence detection running on CrossLink-NX analyzes video streams in real-time and identifies and counts people. This is a very common AI app for consumer/smart home, but also industrial and auto. This was done at half power, 2x performance over Lattice prior FPGAs. Customers can leverage Nexus easily to deliver intelligent Edge embedded vision and I believe doing this at the Edge helps reduce concerns around data latency, cost and privacy.
Here is a link to a video that analyst colleague Mark Vena took:
Demo #2 – Camera aggregation – CrossLink-NX can connect multiple video streams to AP via one I/O. Demo showed four cameras capturing four separate streams, processing them and integrate them onto one stream (in real time) that connects via a single HDMI output. This can conserve I/O in tight design spaces, reduces component count and helps keep system power consumption low. It uses Lattice’s MIPI D-PHY IP cores and is very handy for embedded video applications.
Competitive demo #1 – Power of NX vs. Xilinx Spartan 7 vs. Intel Cyclone 10LP. The demo showed the NX has 50 percent percent lower power consumption at 200 MHz, 75 percent lower at 750 Khz.
Competitive demo #2 –Instant-on I/O. Same comparison as above showed Lattice’s I/Os booting in 3 ms, Spartan 7 was 150 ms, Cyclone 10LP was 165 ms. This is critical in safety critical apps where FPGA has to be available to keep devices operating safely.
Here is a link to a video that analyst colleague Mark Vena took:
I didn’t run these tests myself so I can’t vouch for them 100%, but when I look t was tested, it seemed apples-to-apples to me. Also, the Lattice senior management is very conservative, so I think these are fair comparisons.
Nexus marks a new era in Lattice Semiconductor’s transformation over the past several years. In many ways, I see this as a culmination of everything the “new Lattice” has been working on under Jim Anderson. Lattice clearly understands the growing need for low-power, edge devices, and with this new platform, it is poised to capitalize on it. CrossLink-NX appears to be a great first implementation of Nexus. I believe the degree of success in the new Lattice Nexus platform will be directly related to how easy the company makes its software to use. Generally speaking, FPGAs are more difficult to code for but are much more efficient than a microprocessor or controller. Lattice is already much smaller and more power efficient than its FPGA competitors who haven’t done new designs at this power level in up to a decade.
I look forward to seeing what comes next from Lattice and what sort of use cases Nexus and CrossLink-NX will enable.
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